, ij nc. 20 stern ave. springfield, new jersey 07081 u.s.a. telephone: (973) 376-2922 (212)227-6005 fax: (973) 376-8960 designer's data sheet power field effect transistor n-channel enhancement-mode silicon gate these tmos power fets are designed for medium voltage, high speed power switching applications such as switching regu- lators, converters, solenoid and relay drivers. ? silicon gate for fast switching speeds ? switching times specified at kxtc ? designer's data ? iqss- vds(on)< vgs(th) and soa specified at elevated temperature ? rugged ? soa is power dissipation limited ? source-to-drain diode characterized for use with inductive loads MTM8N20 mtp8n20 tmos power fets b amperes 200 volts maximum ratings thermal characteristics rating drain-source voltage drain-gate voltage (rqs - 1 mo) gate-source voltage ? continuous ? non-repbtitive itp ? 50 /*s) drain current ? continuous ? pulsed total power dissipation @ tc = 25c derate above 2sc operating and storage temperature range symbol vdss vdgr vgs vgsm i id 'dm pd tj. tstg value 200 200 20 40 8 25 75 0.6 -65 to 150 unit vdc vdc vdc vpk adc wans wpc "c thermal resistance junction to case junction to ambient to-204 to-220 maximum lead temperature for soldering to-220 purposes, 1/8" from case for s seconds to-204 rfljc rsja tl 1.67 30 62.5 260 300 t/w ?c mtp8n20 to-220ab nj semi-conductors reserves the right to change test conditions, parameter limits and package dimensions without notice. information furnished by nj semi-conductors is believed to be both accurate and reliable at the time of going to press. however, nj semi-conductors assumes no responsibility for any errors or omissions discovered in its use. nj semi-conductors encourages customers to verify that datasheets are current before placing orders. quality semi-conductors
electrical characteristics (tc = 25?c unless otherwise noted) characteristic symbol win max unit off characteristics drain-source breakdown voltage ivos = rated vdss, vqs = 0, tj = 12pc) gate-body leakage current, forward (vqsf = 20 vdc, vds ~ ) gate-body leakage current, reverse (vqsr = 20 vdc, vds ? 0) v(br)dss >dss igssf igssr 200 - - ? ? 10 100 100 100 vdc >tadc nadc nadc on characteristics* gate threshold voltage (vds = vgs. id = 1 ma> tj = 100c static drain-source on-resistance (vqs - 10 vdc, id = 4 adc) drain-source on-voltage (vqs " 10 v) (id = 8 adc) (id = 4 adc. tj = 100c) forward transconductance (vrjs = 1 5 v, id = 4 a) vgs(th) "ds(on) vds(on) 9fs 2 1.5 ? ? 3 4.5 4 0.4 4 3.6 ? vdc ohm vdc mhos dynamic characteristics input capacitance output capacitance reverse transfer capacitance (vds ~ 25 v vgs ~ f = 1 mhz) see figure 11 ciss cosb crss ? - - 800 300 100 pf switching characteristics* (tj ?? 100ci turn-on delay time rise time turn-off delay time fall time total gate charge gate-source charge gate-dram charge (vdd = 25 v, id = 0-5 rated id see figures 9, 13 and 14 (vds = -8 rsted vdss. id = rated id, vgs = 10 v> td(on) v tdloff) tf og qgs qgd - ? ? - 15 (typ) 8(typ) 7 (typ) 40 150 200 100 30 - ? ns nc source drain diode characteristics* forward on-voltage forward turn-on time reverse recovery time (ig _ rated id vgs = 01 vsd 4 'on ?rr 1 (typ) 2.5 vdc limited by stray inductance 325 (typ) - ns internal package inductance (to-204) internal dram inductance (measured from the contact screw on the header closer to the source pin and the center of the die) internal source inductance (measured from the source pin, 0.25" from the package to the source bond pad) ld l5 5 ityp) 12.5 (typ) nh internal package inductance (to-220) internal drain inductance (measured from the contact screw on tab to center of die) (measured from the drain lead 0.25" from package to center of die) internal source inductance (measured from the source lead 0.25' from package to source bond pad.) ld ls 3.5 (typ) 4.5 (typ) 7.5 (typ) ? ? nh ?pulse test pulse width s 300 ms. duly cycle
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